Cantor mx (#25)

* Swapped in Choc V2 switches, updated routing and outline
Removed redundant groundplane routing
Created double sided chocV2 footprint based on the kbd repo

* Updated readme.

* Added images

* Added images to Readme, fixed formatting

* Added gerbers

* Routing and edgecut cleanup, DRC error fixes

* Fixed drill layer misalingment and regenerated Gerbers

* Updated readme with pcb ordering instructions

* Added branding and rebuilt gerbers

* Moved Blackpill l closer to top edge to accomidate wide-lipped usb-c

* Revised footprint for better Cherry MX 3-pin support
Added teardrops
Revised GND zone params to allow islands
Removed unneeded island creating vias
wiring tweaks

* Adjusted footprint to include Gateron low profile, TTC low profile & cherry low-profile
Rebuilt teardrops
rebuilt ziones

* Fixed LH traces after footprint rework

* Updated readme

* Fixed MUR340 Hybrid footprint
Regenerated .dsn for autorouting

* Swapped in 'kitckitchen sink' switch footprints
Updated trrs jack
poke-yoke Blackpill masking

* Added jlcpcb order number silkscreen
updated version numbering

* Added speaker

* Moved piezo knockout below blackpill

* Modified Choc V2 3rd pin solder pads

* Moved ChocV2 3rd pin, made hotswop pads larger

* Updated choc v2 footprint to match kbd by foostan

* Updated branding, readme, and fixed drc breaks
THIS VERSION WAS SENT OUT FOR PRODUCTION

* Added upcharge notes from test run

* Added breakoff pinky cluster

* Updated breakoff pinky to not cut into hotswop pads

* Fixed broken keys with isolated ground planes
Moved footprints into repo
Connected some ground pins on switch footrpint
Updated docs with broken key notes

* Updated switch footrpints

* Footprint tweaks

* Added updated pic for v1.4

* Fixed choc 2nd min misalingment
Revised 'everything' footprint:
combined red-dragon and MX hole
removed organic masks in leiu of exotic annular rings
fixed malformed edge shapes

* Updated docs and fixed footprint mask

* Footprint cleanup
reverted branding to older MX specific style

* Fixed trrs footprint
added key numbering
cleaned up wiring between blackpill holes

* Removed speaker

* Sent this version out for production test (v1.5)

* Updated readme notes

* Added tentin puck

* Trace cleanup

* Updated trrs silks, bumped font size

* Consolidated cantor mx only footprints
Removed masterkey footprint library
Removed text from tenting puck footprint

* v1.5 tested successfuly

* Checkpoint commit

* Cleanup for PR

* Added gerber zip and Notes

* Updated honey-do

* Ignore cantore mx backup subdirectory

* Ignore Cantor MX backup subdirectory

* Exclude Cantor Classic KiCad backups from git

* Corner radius doubled next to TRRS jack

* Removed pinky snap-off ditch nubs

* Break-out point thickness increased
Thicker breakout points allowed for removal of GND traces on pinky column
Regenerated teardrops and planes

* Rounded corners using plugin
Fixed tiny-chunk traces that were preventing corner rounding
Regenerated tear drops
Regenerated zones
Updated versioning from 1.51 to 1.6

* Fixed malformed rounded corner trace
Regenerated Gerbers
Updated branding URL

* Udated trace connection for switch 11

* Revised branding/attribution

* Fixed rounded trace corner under MCU

* Regenerated Gerbers
Removed small ground zone island
Added vias to connect large GND zone islands
Fixed unrounded traces
Udated branding and attribution

* Pulled in changes from main, reverted readme

* Removed duplicate GND zone on front
Removed unused GND zone front/back vias
Fixed malformed trace on pin 4

* Moved front traces under MCU to back
Minor trace cleanup

* Dialed in teardrops
Moved most horizontal traces under MCU to back
Backside silk logo tweak
Updated drawing sheets attributions and versions
Regenerated Gerbers

* Fixed gerber mystery trace bug
Ran 'Cleanup track and vias' and it wiped out the mystery trace
Also reset origin points
regenrated Gerbers & zips

* Added note to BOM about tenting pucks
fixed readme spelling error
removed Cantor MX backups

.gitignore

@@ -24,3 +24,7 @@ fp-info-cache
 # Exported BOM files
 *.xml
 *.csv
+
+# Cantor backups (auto-created by KiCad)
+Cantor_MX/Cantor_MX-backups/
+Cantor_Classic/keyboard_pcb-backups/

Cantor_Classic/keyboard_pcb.kicad_prl

@@ -0,0 +1,76 @@
+{
+  "board": {
+    "active_layer": 0,
+    "active_layer_preset": "",
+    "auto_track_width": true,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      8,
+      9,
+      10,
+      11,
+      13,
+      15,
+      16,
+      17,
+      18,
+      19,
+      20,
+      21,
+      22,
+      23,
+      24,
+      25,
+      26,
+      27,
+      28,
+      29,
+      30,
+      32,
+      33,
+      34,
+      35,
+      36,
+      39,
+      40
+    ],
+    "visible_layers": "fffffff_ffffffff",
+    "zone_display_mode": 1
+  },
+  "meta": {
+    "filename": "keyboard_pcb.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}

Cantor_Classic/keyboard_pcb.kicad_pro

@@ -1,5 +1,6 @@
 {
   "board": {
+    "3dviewports": [],
     "design_settings": {
       "defaults": {
         "board_outline_line_width": 0.09999999999999999,
@@ -56,20 +57,26 @@
       "rule_severities": {
         "annular_width": "error",
         "clearance": "error",
+        "connection_width": "warning",
         "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
         "courtyards_overlap": "error",
         "diff_pair_gap_out_of_range": "error",
         "diff_pair_uncoupled_length_too_long": "error",
         "drill_out_of_range": "error",
         "duplicate_footprints": "warning",
         "extra_footprint": "warning",
+        "footprint": "error",
         "footprint_type_mismatch": "error",
         "hole_clearance": "error",
         "hole_near_hole": "error",
         "invalid_outline": "error",
+        "isolated_copper": "warning",
         "item_on_disabled_layer": "error",
         "items_not_allowed": "error",
         "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
         "malformed_courtyard": "error",
         "microvia_drill_out_of_range": "error",
         "missing_courtyard": "ignore",
@@ -79,9 +86,14 @@
         "padstack": "error",
         "pth_inside_courtyard": "ignore",
         "shorting_items": "error",
+        "silk_edge_clearance": "warning",
         "silk_over_copper": "warning",
         "silk_overlap": "warning",
         "skew_out_of_range": "error",
+        "solder_mask_bridge": "error",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_thickness": "warning",
         "through_hole_pad_without_hole": "error",
         "too_many_vias": "error",
         "track_dangling": "warning",
@@ -90,7 +102,6 @@
         "unconnected_items": "error",
         "unresolved_variable": "error",
         "via_dangling": "warning",
-        "zone_has_empty_net": "error",
         "zones_intersect": "error"
       },
       "rules": {
@@ -98,26 +109,72 @@
         "allow_microvias": false,
         "max_error": 0.005,
         "min_clearance": 0.0,
+        "min_connection": 0.0,
         "min_copper_edge_clearance": 0.0,
         "min_hole_clearance": 0.25,
         "min_hole_to_hole": 0.25,
         "min_microvia_diameter": 0.19999999999999998,
         "min_microvia_drill": 0.09999999999999999,
+        "min_resolved_spokes": 2,
         "min_silk_clearance": 0.0,
+        "min_text_height": 0.7999999999999999,
+        "min_text_thickness": 0.08,
         "min_through_hole_diameter": 0.3,
         "min_track_width": 0.19999999999999998,
         "min_via_annular_width": 0.049999999999999996,
         "min_via_diameter": 0.39999999999999997,
         "solder_mask_clearance": 0.0,
         "solder_mask_min_width": 0.0,
+        "solder_mask_to_copper_clearance": 0.0,
         "use_height_for_length_calcs": true
       },
+      "teardrop_options": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 5,
+          "td_on_pad_in_zone": false,
+          "td_onpadsmd": true,
+          "td_onroundshapesonly": false,
+          "td_ontrackend": false,
+          "td_onviapad": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
       "track_widths": [],
       "via_dimensions": [],
       "zones_allow_external_fillets": false,
       "zones_use_no_outline": true
     },
-    "layer_presets": []
+    "layer_presets": [],
+    "viewports": []
   },
   "boards": [],
   "cvpcb": {
@@ -339,7 +396,7 @@
   "net_settings": {
     "classes": [
       {
-        "bus_width": 12.0,
+        "bus_width": 12,
         "clearance": 0.2,
         "diff_pair_gap": 0.25,
         "diff_pair_via_gap": 0.25,
@@ -353,13 +410,15 @@
         "track_width": 0.25,
         "via_diameter": 0.8,
         "via_drill": 0.4,
-        "wire_width": 6.0
+        "wire_width": 6
       }
     ],
     "meta": {
-      "version": 2
+      "version": 3
     },
-    "net_colors": null
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
   },
   "pcbnew": {
     "last_paths": {